Line 1: Line 1:
 
Download and install [[File:Pmcdriver.zip]]
 
Download and install [[File:Pmcdriver.zip]]
 +
After install ensure /dev/msrdrv is present. If not, create the node manually using the command
 +
  sudo mknod /dev/msrdrv c 223 0
 +
223 and 0 are the major and minor numbers as defined in msrdrv.h file
 
This install the kernel driver msrdrv which contains all the system calls needed for reading the performance monitoring counters in Intel machines.
 
This install the kernel driver msrdrv which contains all the system calls needed for reading the performance monitoring counters in Intel machines.
  
Line 28: Line 31:
 
  }
 
  }
 
  static void closeDriver(int fd)
 
  static void closeDriver(int fd)
{
+
{
 
     int e;
 
     int e;
 
     e = close(fd);
 
     e = close(fd);
Line 34: Line 37:
 
         perror("Failed to close fd");
 
         perror("Failed to close fd");
 
     }
 
     }
}
+
}
  
 
  struct MsrInOut msr_start[] = {
 
  struct MsrInOut msr_start[] = {

Revision as of 15:26, 16 December 2013

Download and install File:Pmcdriver.zip After install ensure /dev/msrdrv is present. If not, create the node manually using the command

 sudo mknod /dev/msrdrv c 223 0

223 and 0 are the major and minor numbers as defined in msrdrv.h file This install the kernel driver msrdrv which contains all the system calls needed for reading the performance monitoring counters in Intel machines.

So, in the user program just do the following:

1. Load the driver

fd = loadDriver();

2. Send data to driver ioctl(fd, IOCTL_MSR_CMDS, (long long)msr_start);

3. After the execution of the needed code, read the content of the MSR registers:

ioctl(fd, IOCTL_MSR_CMDS, (long long)msr_stop);

4. Close the driver

closeDriver(fd);

The below function and structure definitions must be placed in the user code.

 static int loadDriver()
{
   int fd;
   fd = open("/dev/" DEV_NAME, O_RDWR);
   if (fd == -1) {
       perror("Failed to open /dev/" DEV_NAME);
   }
   return fd;
}
static void closeDriver(int fd)
{
   int e;
   e = close(fd);
   if (e == -1) {
       perror("Failed to close fd");
   }
}
struct MsrInOut msr_start[] = {
       { MSR_WRITE, 0x38f, 0x00, 0x00 },       // ia32_perf_global_ctrl: disable 4 PMCs & 3 FFCs
       { MSR_WRITE, 0xc1, 0x00, 0x00 },        // ia32_pmc0: zero value (35-5)
       { MSR_WRITE, 0xc2, 0x00, 0x00 },        // ia32_pmc1: zero value (35-5)
       { MSR_WRITE, 0xc3, 0x00, 0x00 },        // ia32_pmc2: zero value (35-5)
       { MSR_WRITE, 0xc4, 0x00, 0x00 },        // ia32_pmc3: zero value (35-5)
       { MSR_WRITE, 0x309, 0x00, 0x00 },       // ia32_fixed_ctr0: zero value (35-17)
       { MSR_WRITE, 0x30a, 0x00, 0x00 },       // ia32_fixed_ctr1: zero value (35-17)
       { MSR_WRITE, 0x30b, 0x00, 0x00 },       // ia32_fixed_ctr2: zero value (35-17)
       { MSR_WRITE, 0x186, 0x004101c2, 0x00 }, // ia32_perfevtsel1, UOPS_RETIRED.ALL (19-28)
       { MSR_WRITE, 0x187, 0x0041010e, 0x00 }, // ia32_perfevtsel0, UOPS_ISSUED.ANY (19.22)
       { MSR_WRITE, 0x188, 0x01c1010e, 0x00 }, // ia32_perfevtsel2, UOPS_ISSUED.ANY-stalls (19-22)
       { MSR_WRITE, 0x189, 0x004101a2, 0x00 }, // ia32_perfevtsel3, RESOURCE_STALLS.ANY (19-27)
       { MSR_WRITE, 0x38d, 0x222, 0x00 },      // ia32_perf_fixed_ctr_ctrl: ensure 3 FFCs enabled
       { MSR_WRITE, 0x38f, 0x0f, 0x07 },       // ia32_perf_global_ctrl: enable 4 PMCs & 3 FFCs
       { MSR_STOP, 0x00, 0x00 }
   };
   struct MsrInOut msr_stop[] = {
       { MSR_WRITE, 0x38f, 0x00, 0x00 },       // ia32_perf_global_ctrl: disable 4 PMCs & 3 FFCs
       { MSR_WRITE, 0x38d, 0x00, 0x00 },       // ia32_perf_fixed_ctr_ctrl: clean up FFC ctrls
       { MSR_READ, 0xc1, 0x00 },               // ia32_pmc0: read value (35-5)
       { MSR_READ, 0xc2, 0x00 },               // ia32_pmc1: read value (35-5)
       { MSR_READ, 0xc3, 0x00 },               // ia32_pmc2: read value (35-5)
       { MSR_READ, 0xc4, 0x00 },               // ia32_pmc3: read value (35-5)
       { MSR_READ, 0x309, 0x00 },              // ia32_fixed_ctr0: read value (35-17)
       { MSR_READ, 0x30a, 0x00 },              // ia32_fixed_ctr1: read value (35-17)
       { MSR_READ, 0x30b, 0x00 },              // ia32_fixed_ctr2: read value (35-17)
       { MSR_STOP, 0x00, 0x00 }
   };

Also, do the following includes

#include "msrdrv.h" (Present in the downloaded pmcdriver dolder)
#include <sys/types.h>
#include <sys/stat.h>
#include <sys/ioctl.h>
#include <fcntl.h>
#include <unistd.h>
#include <errno.h>




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Download and install File:Pmcdriver.zip This install the kernel driver msrdrv which contains all the system calls needed for reading the performance monitoring counters in Intel machines.

So, in the user program just do the following:

1. Load the driver

fd = loadDriver();

2. Send data to driver ioctl(fd, IOCTL_MSR_CMDS, (long long)msr_start);

3. After the execution of the needed code, read the content of the MSR registers:

ioctl(fd, IOCTL_MSR_CMDS, (long long)msr_stop);

4. Close the driver

closeDriver(fd);

The below function and structure definitions must be placed in the user code.

 static int loadDriver()
{
   int fd;
   fd = open("/dev/" DEV_NAME, O_RDWR);
   if (fd == -1) {
       perror("Failed to open /dev/" DEV_NAME);
   }
   return fd;
}
static void closeDriver(int fd)

{

   int e;
   e = close(fd);
   if (e == -1) {
       perror("Failed to close fd");
   }

}

struct MsrInOut msr_start[] = {
       { MSR_WRITE, 0x38f, 0x00, 0x00 },       // ia32_perf_global_ctrl: disable 4 PMCs & 3 FFCs
       { MSR_WRITE, 0xc1, 0x00, 0x00 },        // ia32_pmc0: zero value (35-5)
       { MSR_WRITE, 0xc2, 0x00, 0x00 },        // ia32_pmc1: zero value (35-5)
       { MSR_WRITE, 0xc3, 0x00, 0x00 },        // ia32_pmc2: zero value (35-5)
       { MSR_WRITE, 0xc4, 0x00, 0x00 },        // ia32_pmc3: zero value (35-5)
       { MSR_WRITE, 0x309, 0x00, 0x00 },       // ia32_fixed_ctr0: zero value (35-17)
       { MSR_WRITE, 0x30a, 0x00, 0x00 },       // ia32_fixed_ctr1: zero value (35-17)
       { MSR_WRITE, 0x30b, 0x00, 0x00 },       // ia32_fixed_ctr2: zero value (35-17)
       { MSR_WRITE, 0x186, 0x004101c2, 0x00 }, // ia32_perfevtsel1, UOPS_RETIRED.ALL (19-28)
       { MSR_WRITE, 0x187, 0x0041010e, 0x00 }, // ia32_perfevtsel0, UOPS_ISSUED.ANY (19.22)
       { MSR_WRITE, 0x188, 0x01c1010e, 0x00 }, // ia32_perfevtsel2, UOPS_ISSUED.ANY-stalls (19-22)
       { MSR_WRITE, 0x189, 0x004101a2, 0x00 }, // ia32_perfevtsel3, RESOURCE_STALLS.ANY (19-27)
       { MSR_WRITE, 0x38d, 0x222, 0x00 },      // ia32_perf_fixed_ctr_ctrl: ensure 3 FFCs enabled
       { MSR_WRITE, 0x38f, 0x0f, 0x07 },       // ia32_perf_global_ctrl: enable 4 PMCs & 3 FFCs
       { MSR_STOP, 0x00, 0x00 }
   };
   struct MsrInOut msr_stop[] = {
       { MSR_WRITE, 0x38f, 0x00, 0x00 },       // ia32_perf_global_ctrl: disable 4 PMCs & 3 FFCs
       { MSR_WRITE, 0x38d, 0x00, 0x00 },       // ia32_perf_fixed_ctr_ctrl: clean up FFC ctrls
       { MSR_READ, 0xc1, 0x00 },               // ia32_pmc0: read value (35-5)
       { MSR_READ, 0xc2, 0x00 },               // ia32_pmc1: read value (35-5)
       { MSR_READ, 0xc3, 0x00 },               // ia32_pmc2: read value (35-5)
       { MSR_READ, 0xc4, 0x00 },               // ia32_pmc3: read value (35-5)
       { MSR_READ, 0x309, 0x00 },              // ia32_fixed_ctr0: read value (35-17)
       { MSR_READ, 0x30a, 0x00 },              // ia32_fixed_ctr1: read value (35-17)
       { MSR_READ, 0x30b, 0x00 },              // ia32_fixed_ctr2: read value (35-17)
       { MSR_STOP, 0x00, 0x00 }
   };

Also, do the following includes

#include "msrdrv.h" (Present in the downloaded pmcdriver dolder)
#include <sys/types.h>
#include <sys/stat.h>
#include <sys/ioctl.h>
#include <fcntl.h>
#include <unistd.h>
#include <errno.h>




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